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this is information on a product in full production. november 2016 docid029313 rev 3 1/26 STSPIN240 low voltage dual brush dc motor driver datasheet - production data features ? operating voltage from 1.8 to 10 v ? maximum output current 1.3 a rms ? r ds(on) hs + ls = 0.4 ? typ. ? current control with programmable off-time ? full protection set ? non-dissipative overcurrent protection ? short-circuit protection ? thermal shutdown ? energy saving and long battery life with standby consumption less than 80 na applications battery-powered dc motor applications such as: ? toys ? portable printers ? robotics ? point of sale (pos) devices ? portable medical equipment ? healthcare and wellness devices (shavers and toothbrushes) description the STSPIN240 is a dual brush dc motor driver integrating a low r ds(on) power stage in a small qfn 3 x 3 mm package. both the full-bridges implement an independent pwm current controller with fixed off time. the device is designed to operate in battery- powered scenarios and can be forced into a zero- consumption state allowing a significant increase in battery life. the device offers a complete set of protection features including overcurrent, overtemperature and short-circuit protection. qfn 3 x 3 mm (16-pin) www.st.com
contents STSPIN240 2/26 docid029313 rev 3 contents 1 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.3 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.4 esd protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4 pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5 typical applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 6 functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 6.1 standby and power-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 6.2 motor driving . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 6.3 pwm current control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 toff adjustment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 6.4 overcurrent and short-circuit protections . . . . . . . . . . . . . . . . . . . . . . . . . 18 6.5 thermal shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 7 graphs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 8.1 vfqfpn 3 x 3 x 1.0 mm - 16l package information . . . . . . . . . . . . . . . . 23 9 ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 10 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
docid029313 rev 3 3/26 STSPIN240 list of tables 26 list of tables table 1. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 table 2. recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 table 3. thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 table 4. esd protection ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 5. electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 6. pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 7. typical application values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 table 8. truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 table 9. on and slow decay states . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 table 10. recommended r rcoff and c rcoff values according to r off . . . . . . . . . . . . . . . . . . . . 17 table 11. vfqfpn 3 x 3 x 1.0 mm - 16l package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . 24 table 12. device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 table 13. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
list of figures STSPIN240 4/26 docid029313 rev 3 list of figures figure 1. block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 2. pin connection (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 3. typical application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 4. timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 5. pwm current control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 6. off time regulation circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 7. off time vs. r off value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 8. overcurrent and short-circuit protections management . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 9. disable time versus r en and c en values (v dd = 3.3 v) . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 10. disable time versus r en and c en values (v dd = 1.8 v) . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 11. thermal shutdown management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 0 figure 12. power stage resistance versus supply voltage (normalized at v s = 5 v) . . . . . . . . . . . . . . 21 figure 13. power stage resistance versus temperature (n ormalized at t = 25 c) . . . . . . . . . . . . . . . 21 figure 14. overcurrent threshold versus supply voltage (normalized at v s = 5 v) . . . . . . . . . . . . . . . 22 figure 15. vfqfpn 3 x 3 x 1.0 mm - 16l package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 16. vfqfpn 3 x 3 x 1.0 mm - 16l recommended footprin t . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
docid029313 rev 3 5/26 STSPIN240 block diagram 26 1 block diagram figure 1. block diagram %"& $#'%$""$! &!""'$%
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electrical data STSPIN240 6/26 docid029313 rev 3 2 electrical data 2.1 absolute maximum ratings 2.2 recommended operating conditions 2.3 thermal data table 1. absolute maximum ratings symbol parameter test condition value unit v s supply voltage -0.3 to 11 v v in logic input voltage -0.3 to 5.5 v v out - v sense output to sense voltage drop up to 12 v v s - v out supply to output voltage drop up to 12 v v sense sense pins voltage -1 to 1 v v ref reference voltage input -0.3 to 1 v i out,rms continuous power stage output current (each bridge) 1.3 a rms t j,op operative junction temperature -40 to 150 c t j,stg storage junction temperature -55 to 150 c table 2. recommended operating conditions symbol parameter test condition min. typ. max. unit v s supply voltage 1.8 10 v v in logic input voltage 0 5 v v ref reference voltage input 0.1 0.5 v t inw logic inputs positive/negative pulse width 300 ns table 3. thermal data symbol parameter conditions value unit r thja junction to ambient thermal resistance natural convection, according to jesd51-2a (1) 57.1 c/w r thjctop junction to case thermal resistance (top side) simulation with cold plate on package top 67.3 c/w r thjcbot junction to case thermal resistance (bottom side) simulation with cold plate on exposed pad 9.1 c/w r thjb junction to board thermal resistance according to jesd51-8 (1) 23.3 c/w ? jt junction to top characterization according to jesd51-2a (1) 3.3 c/w ? jb junction to board characterization according to jesd51-2a (1) 22.6 c/w 1. simulated on a 21.2 x 21.2 mm board, 2s2p 1 oz copper and four 300 ? m vias below exposed pad.
docid029313 rev 3 7/26 STSPIN240 electrical data 26 2.4 esd protections table 4. esd protection ratings symbol parameter test condition class value unit hbm human body model conforming to ansi/esda/jedec js-001-2014 h2 2 kv cdm charge device model conforming to ansi/esda/jedec js-002-2014 c2a 500 v
electrical characteristics STSPIN240 8/26 docid029313 rev 3 3 electrical characteristics testing conditions: v s = 5 v, t j = 25 c unless otherwise specified. table 5. electrical characteristics symbol parameter test condition min. typ. max. unit supply v sth(on) v s turn-on voltage v s rising from 0 v 1.45 1.65 1.79 v v sth(off) v s turn-off voltage v s falling from 5 v 1.3 1.45 1.65 v v sth(hys) v s hysteresis voltage 180 mv i s v s supply current no commutations, en = 0 r off = 160 k ? 960 1300 ? a no commutations, en = 1 r off = 160 k ? 1500 1950 ? a i s,stby v s standby current stby = 0 v 10 80 na v stbyl standby low logic level input voltage 0.9 v v stbyh standby high logic level input voltage 1.48 v power stage r ds(on)hs+ls total on resistance hs + ls v s = 10 v, i out = 1.3 a 0.4 0.65 ? v s = 10 v, i out = 1.3 a, t j = 125 c (1) 0.53 0.87 v s = 3 v, i out = 0.4 a 0.53 0.8 i dss leakage current outx = v s 1 a outx = gnd - 1 v df freewheeling diode forward voltage i d = 1.3 a 0.9 v t rise rise time v s = 10 v; unloaded outputs 10 ns t fall fall time v s = 10 v; unloaded outputs 10 ns t dt dead time 50 ns pwm current controller v sns,offset sensing offset v ref = 0.5 v; internal reference 20% v ref -15 +15 mv t off to ta l o f f t i m e r off = 10 k ? 9s r off = 160 k ? 125 s ? f osc internal oscillator precision (f osc /f osc,id ) r off = 20 k ? -20% +20% t off,jitter total off time jittering r off = 10 k ? 2%
docid029313 rev 3 9/26 STSPIN240 electrical characteristics 26 logic ios v ih high logic level input voltage 1.6 v v il low logic level input voltage 0.6 v v release fault open drain release voltage 0.4 v v ol low logic level output voltage i ol = 4 ma 0.4 v r stby stby pull-down resistance 36 k ? i pden en pull-down current 10.5 a t end en input propagation delay from en falling edge to out high impedance 55 ns t pwm,d(on) pwmx turn-on propagation delay see figure 4 on page 14 125 ns t pwm,d(off) pwmx turn-off propagation delay see figure 4 140 ns t ph,d phx propagation delay see figure 4 125 ns protections t jsd thermal shutdown threshold 160 c t jsd,hyst thermal shutdown hysteresis 40 c i oc overcurrent threshold see figure 14 on page 22 2a 1. based on characterization data on a limited num ber of samples, not tested during production. table 5. electrical ch aracteristics (continued) symbol parameter test condition min. typ. max. unit
pin description STSPIN240 10/26 docid029313 rev 3 4 pin description figure 2. pin connection (top view) 1. the exposed pad must be connected to ground. table 6. pin description no. name type function 1 pha logic input phase input for bridge a 2 pwma logic input pwm input for bridge a 3 outa1 power output power bridge output side a1 4 sensea power output sense output of the bridge a 5 outa2 power output power bridge output side a2 6 vs supply device supply voltage 7, epad gnd ground device ground 8 outb2 power output power bridge output side b2 9 senseb power output sense output of the bridge b 10 outb1 power output power bridge output side b1 11 ref analog input reference voltage for the current limiter circuitry 12 toff analog input internal oscillator frequency adjustment 13 en\fault logic input\ open drain output logic input 5 v compliant with open drain output. this is the power stage enable (when low, the power stage is turned off) and is forced low through the integrated open drain mosfet when a failure occurs. 1 2 3 4 pha pwma outa1 sensea 12 11 10 9 toff ref outb1 senseb 56 8 7 outa2 vs outb2 gnd 16 epad 15 13 14 pwmb phb en\fault stby\ reset
docid029313 rev 3 11/26 STSPIN240 pin description 26 14 stby\reset logic input logic input 5 v compliant. when forced low, the device is forced into low consumption mode. 15 phb logic input phase input for bridge b 16 pwmb logic input pwm input for bridge b table 6. pin description (continued) no. name type function
typical applications STSPIN240 12/26 docid029313 rev 3 5 typical applications figure 3. typical application schematic table 7. typical application values name value c s 2.2 f / 16 v c spol 22 f / 16 v r snsa , r snsb 330 m ? / 1 w c en 10 nf / 6.3 v r en 18 k ? c stby 1 nf / 6.3 v r stby 18 k ? c rcoff 22 nf r rcoff 1 k ? r off 47 k ? (t off ? 37 s) STSPIN240 vs stby\reset en\fault pwma pha pwmb phb ref toff gnd outa1 outa2 outb1 sensea senseb outb2 brush dc a brush dc b r snsa r snsb v s pwm v dd c spol c s c stby c en r stby r en c rcoff r rcoff r off
docid029313 rev 3 13/26 STSPIN240 functional description 26 6 functional description the STSPIN240 is a dual brush dc motor driver integrating two pwm current controllers and a power stage composed by two fully-protected full-bridges. 6.1 standby and power-up the device provides a low settable cons umption mode forcing the stby\reset input below the v stbyl threshold. when the device is in standby status, the power stage is disabled (outputs are in high impedance) and the supply to the integrated control circuitry is cut off. 6.2 motor driving the outputs of each bridge are controlled by the respective pwmx and phx inputs as listed in table 8 . table 8. truth table en\fault phx pwmx outx1 outx2 full-bridge condition 0 x x hiz hiz disabled 1 0 0 gnd gnd both ls on 1 0 1 gnd vs hs2 and ls1 on (current x1 ? x2) 1 1 0 gnd gnd both ls on 1 1 1 vs gnd hs1 and ls2 on (current x1 ? x2)
functional description STSPIN240 14/26 docid029313 rev 3 figure 4. timing diagram phx t pwm,d(on) t pwm,d(off) t ph,d t ph,d 10% 10% 10% 90% pwmx outx1 outx2
docid029313 rev 3 15/26 STSPIN240 functional description 26 6.3 pwm current control the device implements two independent current controllers, one for each full-bridge. the voltage on the sense pins (v sensea and v senseb ) is compared to the reference voltage applied on the ref pin (v ref ). when v sensex > v ref , the current limiter is triggered, the off time counter is started and the decay sequence is performed. the decay sequence starts turning on both low sides of the full-bridge. the reference voltage value, v ref , has to be selected according to the load current target value (peak value) and sense resistors value. equation 1 v ref = r snsx ? i load,peak in choosing the sense resistor value, two main issues must be taken into account: ? the sensing resistor dissipates energy and provides dangerous negative voltages on the sense pins during the current recirculatio n. for this reason the resistance of this component should be kept low (using multiple resistors in pa rallel will help to obtain the required power rating with standard resistors). ? the lower is the r snsx value, the higher is the peak current error due to noise on the v ref pin and to the input offset of the curr ent sense comparator: too low values of r snsx must be avoided. table 9. on and slow decay states phx pwmx on decay 00 hsx1 = off lsx1 = on hsx2 = off lsx2 = on n.a. (1) 1. during decays the inputs values are ignored until the s ystem returns to on condition (decay time expired). 01 hsx1 = off lsx1 = on hsx2 = on lsx2 = off hsx1 = off lsx1 = on hsx2 = off lsx2 = on 10 hsx1 = off lsx1 = on hsx2 = off lsx2 = on n.a. (1) 11 hsx1 = on lsx1 = off hsx2 = off lsx2 = on hsx1 = off lsx1 = on hsx2 = off lsx2 = on
functional description STSPIN240 16/26 docid029313 rev 3 figure 5. pwm current control 7 4 4&/4&9 74 0659 0659 3 4&/4& 7 4 4&/4&9 74 0659 0659 3 4&/4& 7 4 4&/4&9 74 0659 0659 3 4&/4& 7 4 4&/4&9 74 0659 0659 3 4&/4& * qibtf u 0'' u %5 7 4&/4&9 7 3&' 7 3&'9 3 4&/4& 18.9 1)9 4& ".
docid029313 rev 3 17/26 STSPIN240 functional description 26 toff adjustment the decay time is adjusted through an exter nal resistor connected between the toff pin and ground as shown in figure 6 . a small rc series must be in serted in parallel with the regulator resistor in order to increase the stability of the re gulation circuit according to indications listed in table 10 . figure 6. off time regulation circuit the relation between the off time and the exter nal resistor value is shown in the graph of figure 7 . the value typically ranges from 10 s to 150 s. figure 7. off time vs. r off value table 10. recommended r rcoff and c rcoff values according to r off r off r rcoff c rcoff 10 k ? r off < 82 k ? 1 k ? 22 nf 82 k ? r off 160 k ? 2.2 k ? 22 nf 50'' 3 0'' $ 3$0'' 3 3$0'' ".
functional description STSPIN240 18/26 docid029313 rev 3 6.4 overcurrent and shor t-circuit protections the device embeds circuitry protecting each power output against the overload and short- circuit conditions (short to ground, short to vs and short between outputs). when the overcurrent or the short-circuit protection is triggered, the power stage is disabled and the en\fault input is forced low through the integrated open drain mosfet discharging the external c en capacitor. the power stage is kept disabled and the o pen drain mosfet is kept on until the en\fault input falls below the v release threshold, then the c en capacitor is charged through the r en resistor. figure 8. overcurrent and short-circuit protections management the total disable time after an overcurrent event can be set by properly sizing the external network connected to the en\fault pin (refer to figure 9 and figure 10 ): equation 2 t dis = t discharge + t charge but t charge is normally much higher than t discharge , thus we can consider only the second one contribution: equation 3 where v dd is the pull-up voltage of the r en resistor. 7 &/ 1pxfs tubhf '" 6 -5 7 *) 7 3&-&"4& 7 *- 0wfsdvssfou qspufdujpo &/"#-&% %*4"#-&% &/"#-&% u 0$4% u %*4 u ejtdibshf u dibshf 7 3&-&"4& &/='"6 -5 '"6-5@.$6 .$6 %&7*$& &/@.$6 3&-&"4& &/ 0$=4$ 5)4% '" 6 -5 $ &/ * 1%&/ 3 &/ ".
docid029313 rev 3 19/26 STSPIN240 functional description 26 figure 9. disable time versus r en and c en values (v dd = 3.3 v) figure 10. disable time versus r en and c en values (v dd = 1.8 v) %jtbcmfujnf<?t> $ &/ <o'> %%
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functional description STSPIN240 20/26 docid029313 rev 3 6.5 thermal shutdown the device embeds circuitry protecting it from overtemperature conditions. when the thermal shutdown temperature is re ached, the power stage is disabled and the en\fault input is forced low through the integrated open drain mosfet. the protection and the en\fault output are released when the ic temperature returns below a safe operating value (t jsd - t jsd,hyst ). figure 11. thermal shutdown management 7 &/ '" 6 -5 7 *) 7 3&-&"4& 7 *- 5 k 5 k4% 5 k4% iztu 5ifsnbm tivuepxo 7 3&-&"4& &/='"6-5 '"6-5@.$6 .$6 %&7*$& &/@.$6 3&-&"4& &/ 0$=4$ 5)4% '" 6 -5 $ &/ 3 &/ 1pxfs tubhf &/"#-&% %*4"#-&% %*4"#-&% &/"#-&% u 5)4% * 1%&/ ".
docid029313 rev 3 21/26 STSPIN240 graphs 26 7 graphs figure 12. power stage resistance versus supply voltage (normalized at v s = 5 v) figure 13. power stage resistance versus temperature (normalized at t = 25 c) 3 %4 0/
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graphs STSPIN240 22/26 docid029313 rev 3 figure 14. overcurrent threshold versus supply voltage (normalized at v s = 5 v) *0$%uisftipme<"> 7 4 <7> ".
docid029313 rev 3 23/26 STSPIN240 package information 26 8 package information in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack specifications, grade definitions a nd product status are available at: www.st.com . ecopack is an st trademark. 8.1 vfqfpn 3 x 3 x 1.0 mm - 16l package information figure 15. vfqfpn 3 x 3 x 1.0 mm - 16l package outline
package information STSPIN240 24/26 docid029313 rev 3 figure 16. vfqfpn 3 x 3 x 1.0 mm - 16l recommended footprint table 11. vfqfpn 3 x 3 x 1.0 mm - 16l package mechanical data symbol dimensions (mm) notes min. typ. max. a 0.80 0.90 1.00 (1) 1. vfqfpn stands for ?thermally enhanced very th in fine pitch quad packages no lead?. very thin: 0.80 < a 1.00 mm / fine pitch: e < 1.00 mm. the pin #1 identifier must be present on the top surfac e of the package by using an indentation mark or an other feature of the package body. a1 0.02 a3 0.20 b 0.18 0.25 0.30 d 2.85 3.00 3.15 d2 1.70 1.80 1.90 e 2.85 3.00 3.15 e2 1.70 1.80 1.90 e0.50 l 0.45 0.50 0.55
docid029313 rev 3 25/26 STSPIN240 ordering information 26 9 ordering information 10 revision history table 12. device summary order code package packaging STSPIN240 vfqfpn 3x3x1.0 16l tape and reel table 13. document revision history date revision changes 06-may-2016 1 initial release. 30-jun-2016 2 updated document status to datasheet - production data on page 1. updated table 1 on page 6 (changed max. value of v s from 12 to 11). updated table 7 on page 11 (changed value of t off from 47 s to 37 s). 04-nov-2016 3 updated figure 1 on page 5 and figure 12 on page 21 (replaced by new figures). updated table 2 on page 6 (added t inw symbol). updated table 3 on page 6 (replaced by new table). minor modifications throughout document.
STSPIN240 26/26 docid029313 rev 3 important notice ? please read carefully stmicroelectronics nv and its subsidiaries (?st?) reserve the right to make changes, corrections, enhancements, modifications, and improvements to st products and/or to this document at any time without notice. purchasers should obtain the latest relevant in formation on st products before placing orders. st products are sold pursuant to st?s terms and conditions of sale in place at the time of o rder acknowledgement. purchasers are solely responsible for the choice, selection, and use of st products and st assumes no liability for application assistance or the design of purchasers? products. no license, express or implied, to any intellectual property right is granted by st herein. resale of st products with provisions different from the information set forth herein shall void any warranty granted by st for such product. st and the st logo are trademarks of st. all other product or service names are the property of their respective owners. information in this document supersedes and replaces information previously supplied in any prior versions of this document. ? 2016 stmicroelectronics ? all rights reserved

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